Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to an auto-refresh operation of a semiconductor memory device.
Generally, a semiconductor memory device is required to perform a refresh operation in order to retain data stored in a memory cell. A refresh operation is an operation of reading data stored in a memory cell, amplifying the read data, and again storing data in the corresponding memory cell. Due to a memory cell structure of a semiconductor memory device configured with a capacitor, if the refresh operation is not carried out, a memory cell loses data due to a leakage current. Hence, the refresh operation must be carried out.
The refresh operation is performed by activating a word line using only a row address, and then enabling a sense amplifier. In this case, only the sense amplifier is operated without outputting data.
The refresh operation is classified into an auto-refresh operation and a self-refresh operation. The auto-refresh operation periodically receives a refresh operation during the operation of a chip, stops receiving another command, performs a refresh operation, and again receives another command. The self-refresh operation periodically performs data read and write operations, even when a chip is in an idle state, in order to prevent data loss. At this time, an internal timer is operated to determine a refresh period.
FIG. 1 is a block diagram and a timing diagram illustrating an auto-refresh operation of a conventional semiconductor memory device.
Referring to FIG. 1, whenever an auto-refresh command AUTO_REFRESH_CMD is inputted, one of N word lines included in a bank must be refreshed. In this case, the N word lines may be selected according to multi-bit internal addresses IN_ADDRESS<0:K>. Therefore, whenever the auto-refresh command AUTO_REFRESH_CMD is inputted, one of the N word lines may be selected and refreshed while changing the internal addresses IN_ADDRESS<0:K>.
That is, as can be seen from the timing diagram of FIG. 1, the operation of sequentially refreshing the N word lines is an operation of repeating N times the operation of refreshing the word lines one by one while increasing the internal addresses IN_ADDRESS<0:K> one by one according to the input of the auto-refresh command AUTO_REFRESH_CMD.
However, like in a conventional memory device, if an operation of counting the internal addresses IN_ADDRESS<0:K> is performed as many times as the number of word lines in order to refresh a plurality of word lines included in a bank, the internal addresses IN_ADDRESS<0:K> having a larger number of bits are required when a larger number of word lines are included in a bank. Furthermore, a larger amount of electric current is consumed in order to count the internal addresses IN_ADDRESS<0:K> having a large number of bits.
Moreover, as the values of the internal addresses IN_ADDRESS<0:K> are greatly changed, a larger amount of electric current is consumed in a peripheral circuit required in an operation of selecting one of the word lines included in a bank according to the value of the internal addresses IN_ADDRESS<0:K>.